This invention relates to digital data capture circuits, and more particularly to a data capture window extension circuit having a clock rate equal to the data rate.
In many instances in digital electronics, it is necessary to detect the presence of an input signal at a particular moment in time. For example, in magnetic disc storage technology, several coding methods have been developed for use in storing data on rigid or floppy magnetic discs. These coding methods include frequency modulation and modified frequency modulation. In these coding schemes, actual data and clock signals are combined into one signal (Read Data) and recorded on the magnetic disc. In order to read this recorded signal back, electronic controller circuitry especially adapted for detecting the presence of the combined read/clock signal has been used in the past.
The prior art typically requires a system clock for the controller circuitry that operates at a rate twice that of the Read Data ("RD") to be detected from the disc. However, as the frequency of data recording increases in disc devices (particularly in the recent Winchester rigid disc technology), the speed limitations of the metal oxide semiconductor ("MOS") technology typically used in the controller circuits is pressed to its limits and at times exceeded. At present, many Winchester-type discs record the combined clock/data signal at a frequency of five megahertz. The prior art would require controller circuitry operating at ten megahertz in order to read this information.
The present invention consists of a circuit that permits the detection and capture of Read Data at a particular rate using only a system Read Clock ("RC") operating at an equal rate. Thus, a read data signal recorded at five megahertz would require only a five megahertz Read Clock. The lower frequency Read Clock necessary to operate the detection circuitry permits the circuit to be easily fabricated using standard MOS technology.
It is therefore an object of this invention to provide a new and improved digital data capture window extension circuit that permits reading data at a high rate using a system clock that matches the frequency of the incoming data.